1. Field of Invention
The present invention relates to a method for manufacturing an integrated circuit. More particularly, the present invention relates to a method for manufacturing a semiconductor device.
2. Description of Related Art
In the process for manufacturing a semiconductor device, with the increasing of the integration of the devices, the area provided by a single wafer is not enough for forming the necessary interconnects. Currently, in order to full fill the demands for the increasing of the interconnects while the size of the transistor is decreased, the interconnects is composed of more than two metal layers.
In the interconnects, the inter-layer dielectric layer and the inter-metal dielectric layer between two metal layers are made by performing a low temperature process, such as the plasma enhanced chemical vapor deposition or the high density plasma chemical vapor deposition. Nevertheless, once the plasma process for forming the dielectric layer is interrupted, the particles accumulate on the dielectric layer to affect the electric property of the semiconductor device. Hence, the yield and the reliability of the semiconductor device is decreased.